Hardware reconfiguration based on broadcasted digital TV signal

Hardware reconfiguration based on broadcasted digital TV signal This paper aims to show the technical feasibility and current development status of a hardwarereconfiguration scheme via digital TV (DTV) signal. The scheme is able to deliver the pre-synthetized Field Programmable Gate Array (FPGA) hardware bit-stream (core) to DTV receivers from different manufacturers. Thus, the receiver framework can remount the core and reconfigure the FPGA device itself. This innovative approach presents a new hardware reconfiguration scheme that can be used in several projects of intelligent reconfigurable devices in the field. This helps improve future embedded systems and receiver hardware architectures so that the hardware legacy added by the use of Application Specific Integrated Circuit (ASIC) component devices is minimized.