Low power X-band passive RFID tag design in 0.18µm CMOS This paper presents a novel ultra low power X-band passive RFID tag. Supply voltages for both digital and analog circuits are chosen carefully for minimum power consumption than the existing technology. Key design issues addressed in this paper include the design of low power RFID building blocks and interaction between them. The tag is designed in standard 0.18μm CMOS technology.